Projects per year
Personal profile
Expertise related to UN SDGs
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
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Projects and Grants
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ALIGN: Analog Layout, Intelligently Generated from Netlists
Sapatnekar, S. S. & Harjani, R.
8/13/18 → 8/12/21
Project: Research project
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U-Fast Hoppor: Ultra-Fast Hopping Orthogonal frequency c
USDOD DEFENSE ADV RES PROJECTS
10/27/16 → 8/18/20
Project: Research project
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Digital Yet Deliberately Random -- Synthesizing Logical
Riedel, M., Bazargan, K., Harjani, R. & Lilja, D. J.
7/1/12 → 6/30/15
Project: Research project
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Research output
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A Customized Graph Neural Network Model for Guiding Analog IC Placement
Li, Y., Lin, Y., Madhusudan, M., Sharma, A., Xu, W., Sapatnekar, S. S., Harjani, R. & Hu, J., Nov 2 2020, In: IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. 2020-November, 9256781.Research output: Contribution to journal › Conference article › peer-review
Open Access -
A general approach for identifying hierarchical symmetry constraints for analog circuit layout
Kunal, K., Poojary, J., Dhar, T., Madhusudan, M., Harjani, R. & Sapatnekar, S. S., Nov 2 2020, In: IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. 2020-November, 9256812.Research output: Contribution to journal › Conference article › peer-review
Open Access -
ALIGN: A System for Automating Analog Layout
Dhar, T., Kunal, K., Li, Y., Madhusudan, M., Poojary, J., Sharma, A. K., Xu, W., Burns, S. M., Harjani, R., Hu, J., Kirkpatrick, D. A., Mukherjee, P., Sapatnekar, S. S. & Yaldiz, S., 2020, (Accepted/In press) In: IEEE Design and Test.Research output: Contribution to journal › Article › peer-review
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Exploring a machine learning approach to performance driven analog IC placement
Li, Y., Lin, Y., Madhusudan, M., Sharma, A., Xu, W., Sapatnekar, S., Harjani, R. & Hu, J., Jul 2020, Proceedings - 2020 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020. IEEE Computer Society, p. 24-29 6 p. 9154987. (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; vol. 2020-July).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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GANA: Graph Convolutional Network Based Automated Netlist Annotation for Analog Circuits
Kunal, K., Dhar, T., Madhusudan, M., Poojary, J., Sharma, A., Xu, W., Burns, S. M., Hu, J., Harjani, R. & Sapatnekar, S. S., Mar 2020, Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020. Di Natale, G., Bolchini, C. & Vatajelu, E-I. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 55-60 6 p. 9116329. (Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
2 Scopus citations