1-10GHz inductorless receiver in 0.13μm CMOS

Liuchun Cai; Ramesh Harjani

doi:10.1109/RFIC.2009.5135490

1-10GHz inductorless receiver in 0.13μm CMOS

Liuchun Cai, Ramesh Harjani

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

5 Scopus citations

Abstract

In this paper, we describe an inductorless wideband radio receiver architecture from 1GHz to 10GHz. Two receiver RF frontends designs are presented and compared: a traditional inductor peaking LNA and mixer (IPLM) and a capacitive peaking LNA and mixer circuit (CPLM). Measurement results indicate that CPLM with the same bandwidth has better linearity, comparable noise figure and uses only 17% more power. The silicon area for the CPLM is only 22% of the IPLM. Both designs can be mated with an inductorless, ring-oscillator based, wide lock range and low power PLL also shown in this paper.

Original language	English (US)
Title of host publication	Proceedings of the 2009 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2009
Pages	61-64
Number of pages	4
DOIs	https://doi.org/10.1109/RFIC.2009.5135490
State	Published - Oct 27 2009
Event	2009 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2009 - Boston, MA, United States Duration: Jun 7 2009 → Jun 9 2009

Publication series

Name	Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
ISSN (Print)	1529-2517

Other

Other	2009 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2009
Country/Territory	United States
City	Boston, MA
Period	6/7/09 → 6/9/09

Keywords

Inductorless
RF frontends
Receiver
Wideband

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10.1109/RFIC.2009.5135490

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Cai, L & Harjani, R 2009, 1-10GHz inductorless receiver in 0.13μm CMOS. in Proceedings of the 2009 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2009., 5135490, Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium, pp. 61-64, 2009 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2009, Boston, MA, United States, 6/7/09. https://doi.org/10.1109/RFIC.2009.5135490

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abstract = "In this paper, we describe an inductorless wideband radio receiver architecture from 1GHz to 10GHz. Two receiver RF frontends designs are presented and compared: a traditional inductor peaking LNA and mixer (IPLM) and a capacitive peaking LNA and mixer circuit (CPLM). Measurement results indicate that CPLM with the same bandwidth has better linearity, comparable noise figure and uses only 17% more power. The silicon area for the CPLM is only 22% of the IPLM. Both designs can be mated with an inductorless, ring-oscillator based, wide lock range and low power PLL also shown in this paper.",

keywords = "Inductorless, RF frontends, Receiver, Wideband",

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AU - Harjani, Ramesh

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N2 - In this paper, we describe an inductorless wideband radio receiver architecture from 1GHz to 10GHz. Two receiver RF frontends designs are presented and compared: a traditional inductor peaking LNA and mixer (IPLM) and a capacitive peaking LNA and mixer circuit (CPLM). Measurement results indicate that CPLM with the same bandwidth has better linearity, comparable noise figure and uses only 17% more power. The silicon area for the CPLM is only 22% of the IPLM. Both designs can be mated with an inductorless, ring-oscillator based, wide lock range and low power PLL also shown in this paper.

AB - In this paper, we describe an inductorless wideband radio receiver architecture from 1GHz to 10GHz. Two receiver RF frontends designs are presented and compared: a traditional inductor peaking LNA and mixer (IPLM) and a capacitive peaking LNA and mixer circuit (CPLM). Measurement results indicate that CPLM with the same bandwidth has better linearity, comparable noise figure and uses only 17% more power. The silicon area for the CPLM is only 22% of the IPLM. Both designs can be mated with an inductorless, ring-oscillator based, wide lock range and low power PLL also shown in this paper.

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1-10GHz inductorless receiver in 0.13μm CMOS

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