TY - JOUR
T1 - 17-level inverter with low component count for open-end induction motor drives
AU - Kshirsagar, Abhijit
AU - Kaarthik, R. Sudharshan
AU - Rahul, Arun
AU - Gopakumar, K.
AU - Umanand, Loganathan
AU - Biswas, Sujit K.
AU - Cecati, Carlo
N1 - Publisher Copyright:
© 2018, The Institution of Engineering and Technology.
PY - 2018/5/1
Y1 - 2018/5/1
N2 - This study presents a 17-level inverter-based induction motor drive for high-resolution multilevel voltage space-vector (SV) generation. The proposed topology consists of a three-level inverter and a seven-level inverter connected to an open-end winding induction machine. The two inverters are powered by two unequal DC supplies, resulting in a low component count, with just 12 switches and three floating capacitors per phase. The voltage SVs applied by the two inverters are chosen to eliminate circulating power flow and prevent DC bus overcharging. In addition, the switching states of both inverters are chosen in order to keep voltages of all floating capacitors well-controlled. Since the capacitors voltages are controlled using the phase currents, additional pre-charging circuitry is not required. A modulation scheme using level-shifted carriers has also been developed, which can be used with both V/f control and d-q control. The high-voltage inverter has a low effective switching frequency and the low-voltage inverter has a high effective switching frequency, reducing the switching loss. The included results of steady-state and transient testing of an experimental prototype demonstrate that the proposed scheme is suited for industrial drives and traction applications.
AB - This study presents a 17-level inverter-based induction motor drive for high-resolution multilevel voltage space-vector (SV) generation. The proposed topology consists of a three-level inverter and a seven-level inverter connected to an open-end winding induction machine. The two inverters are powered by two unequal DC supplies, resulting in a low component count, with just 12 switches and three floating capacitors per phase. The voltage SVs applied by the two inverters are chosen to eliminate circulating power flow and prevent DC bus overcharging. In addition, the switching states of both inverters are chosen in order to keep voltages of all floating capacitors well-controlled. Since the capacitors voltages are controlled using the phase currents, additional pre-charging circuitry is not required. A modulation scheme using level-shifted carriers has also been developed, which can be used with both V/f control and d-q control. The high-voltage inverter has a low effective switching frequency and the low-voltage inverter has a high effective switching frequency, reducing the switching loss. The included results of steady-state and transient testing of an experimental prototype demonstrate that the proposed scheme is suited for industrial drives and traction applications.
UR - http://www.scopus.com/inward/record.url?scp=85045692223&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85045692223&partnerID=8YFLogxK
U2 - 10.1049/iet-pel.2017.0492
DO - 10.1049/iet-pel.2017.0492
M3 - Article
AN - SCOPUS:85045692223
SN - 1755-4535
VL - 11
SP - 922
EP - 929
JO - IET Power Electronics
JF - IET Power Electronics
IS - 5
ER -