50-GHz integrated interconnects in silicon optical microbench technology

Swagata Riki Banerjee, Rhonda Franklin Drayton

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

A custom-designed silicon-based 50-GHz interconnect is integrated for packaging demonstrations of broadband optoelectronic (OE) applications in silicon optical microbench technology. The half-shielded (or partially shielded) 0.5-cm interconnect has 25-dB isolation and 0.9-dB transmission loss over 50 GHz. When implemented in this packaged architecture, the nature of the interconnect minimizes coupling and eliminates the need for an external test fixture that is prevalent in a more conventional approach. The interconnect is further demonstrated in a multiport electrical package to illustrate the potential of this architecture up to 40-Gb data rates, and the resulting package has insertion loss less than 5 dB at 50 GHz.

Original languageEnglish (US)
Pages (from-to)307-313
Number of pages7
JournalIEEE Transactions on Advanced Packaging
Volume29
Issue number2
DOIs
StatePublished - May 2006

Bibliographical note

Funding Information:
Manuscript received June 15, 2004; revised March 24, 2005. This work was supported by the National Science Foundation under Grant ECS-0123497. S. R. Banerjee is with the 3M Corporation, St. Paul, MN 55144 USA (e-mail: rikibanerjee@gmail.com). R. F. Drayton is with the Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN 55455 USA (email: drayton@ece.umn.edu). Digital Object Identifier 10.1109/TADVP.2006.871203

Keywords

  • Integrated interconnects
  • Integrated packaging
  • Microstrip
  • Silicon optical bench

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