TY - GEN
T1 - A 24-GHz phased-array receiver in 0.13-μm CMOS using an 8-GHz LO
AU - Patnaik, Satwik
AU - Harjani, Ramesh
PY - 2010
Y1 - 2010
N2 - This paper presents a 24-GHz two-channel phased-array receiver. The receiver adopts the LO-phase-shifting approach and employs a sub-harmonically injection-locked phase-shifter. A CMOS-only prototype, fabricated in a 130-nm SiGe BiCMOS technology, draws 16-mA of current from a 1.5-V supply and consists of a injection-locked oscillator (operating as a phase-shifter, LO-buffer and frequency multiplier), a down-conversion mixer and an IF-buffer. The worst-case measured amplitude and phase errors are 1.5-dB and 4°. The two-channel receiver occupies an active area of 0.23-mm2.
AB - This paper presents a 24-GHz two-channel phased-array receiver. The receiver adopts the LO-phase-shifting approach and employs a sub-harmonically injection-locked phase-shifter. A CMOS-only prototype, fabricated in a 130-nm SiGe BiCMOS technology, draws 16-mA of current from a 1.5-V supply and consists of a injection-locked oscillator (operating as a phase-shifter, LO-buffer and frequency multiplier), a down-conversion mixer and an IF-buffer. The worst-case measured amplitude and phase errors are 1.5-dB and 4°. The two-channel receiver occupies an active area of 0.23-mm2.
KW - CMOS
KW - Injection-locked oscillator (ILO)
KW - Mm-wave
KW - Phased-array
KW - Sub-harmonic injection-locking
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U2 - 10.1109/RFIC.2010.5477267
DO - 10.1109/RFIC.2010.5477267
M3 - Conference contribution
AN - SCOPUS:77954506050
SN - 9781424462421
T3 - Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
SP - 465
EP - 468
BT - Proceedings of the 2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010
T2 - 2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010
Y2 - 23 May 2010 through 25 May 2010
ER -