A C to hardware/software compiler

Kiarash Bazargan; Ryan Kastner; Seda Ogrenci; Majid Sarrafzadeh

doi:10.1109/FPGA.2000.903440

A C to hardware/software compiler

Kiarash Bazargan, Ryan Kastner, Seda Ogrenci, Majid Sarrafzadeh

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

7 Scopus citations

Abstract

Improvements in the FPGA technology have resulted in introduction of reconfigurable computing machines, where the hardware adapts itself to the running application to gain speedup. This paper presents a top-down compilation method, under development, for such systems. We compile a C program into hierarchical VHDL source files, and annotate them with the placement information of the hardware modules to be configured on the FPGA. Static scheduling combined with a fast, two-stage placement core reduces the compilation time of large programs to minutes.

Original language	English (US)
Title of host publication	Proceedings - 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Editors	Brad L. Hutchings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	331-332
Number of pages	2
ISBN (Electronic)	0769508715
DOIs	https://doi.org/10.1109/FPGA.2000.903440
State	Published - 2000
Event	IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2000 - Napa Valley, United States Duration: Apr 17 2000 → Apr 19 2000

Publication series

Name	IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings
Volume	2000-January
ISSN (Print)	1082-3409

Other

Other	IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2000
Country/Territory	United States
City	Napa Valley
Period	4/17/00 → 4/19/00

Bibliographical note

Publisher Copyright:
© 2000 IEEE.

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Bazargan, K., Kastner, R., Ogrenci, S., & Sarrafzadeh, M. (2000). A C to hardware/software compiler. In B. L. Hutchings (Ed.), Proceedings - 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (pp. 331-332). Article 903440 (IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings; Vol. 2000-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/FPGA.2000.903440

A C to hardware/software compiler. / Bazargan, Kiarash; Kastner, Ryan; Ogrenci, Seda et al.
Proceedings - 2000 IEEE Symposium on Field-Programmable Custom Computing Machines. ed. / Brad L. Hutchings. Institute of Electrical and Electronics Engineers Inc., 2000. p. 331-332 903440 (IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings; Vol. 2000-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Bazargan, K, Kastner, R, Ogrenci, S & Sarrafzadeh, M 2000, A C to hardware/software compiler. in BL Hutchings (ed.), Proceedings - 2000 IEEE Symposium on Field-Programmable Custom Computing Machines., 903440, IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings, vol. 2000-January, Institute of Electrical and Electronics Engineers Inc., pp. 331-332, IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2000, Napa Valley, United States, 4/17/00. https://doi.org/10.1109/FPGA.2000.903440

Bazargan K, Kastner R, Ogrenci S, Sarrafzadeh M. A C to hardware/software compiler. In Hutchings BL, editor, Proceedings - 2000 IEEE Symposium on Field-Programmable Custom Computing Machines. Institute of Electrical and Electronics Engineers Inc. 2000. p. 331-332. 903440. (IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings). doi: 10.1109/FPGA.2000.903440

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A C to hardware/software compiler

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