A multi-phase VCO quantizer based adaptive digital LDO in 65nm CMOS technology

Somnath Kundu; Chris H. Kim

doi:10.1109/ISCAS.2017.8050960

A multi-phase VCO quantizer based adaptive digital LDO in 65nm CMOS technology

Somnath Kundu, Chris H. Kim

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Scopus citations

Abstract

A digital low-dropout (DLDO) voltage regulator circuit is proposed utilizing a multi-phase VCO based time quantizer. This high-resolution quantizer requires much lower sampling clock frequency compared to the previously proposed 1-bit comparator based architectures and thereby ensures stability over a wide operating condition, while reducing the dynamic power consumption at the same time. The DLDO operates at an input voltage range of 0.6V to 1.2V and delivers a maximum 115mA current with a 50mV dropout, simulated in a 65nm LP CMOS technology. A dynamically adaptive sampling clock can reduce the output voltage droop by 40-60% and provides 3.5-6.5 times faster settling compared to a baseline DLDO design that uses a fixed sampling clock frequency. The FOM calculated at 0.9V output is 0.53ps. The maximum current efficiency is 99.3%.

Original language	English (US)
Title of host publication	IEEE International Symposium on Circuits and Systems
Subtitle of host publication	From Dreams to Innovation, ISCAS 2017 - Conference Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781467368520
DOIs	https://doi.org/10.1109/ISCAS.2017.8050960
State	Published - Sep 25 2017
Event	50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 - Baltimore, United States Duration: May 28 2017 → May 31 2017

Other

Other	50th IEEE International Symposium on Circuits and Systems, ISCAS 2017
Country/Territory	United States
City	Baltimore
Period	5/28/17 → 5/31/17

Keywords

adaptive sampling
digital low dropout regulator
time-based quantizer
voltage-controlled oscillator

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A multi-phase VCO quantizer based adaptive digital LDO in 65nm CMOS technology. / Kundu, Somnath; Kim, Chris H.
IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 2017. 8050960.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kundu, S & Kim, CH 2017, A multi-phase VCO quantizer based adaptive digital LDO in 65nm CMOS technology. in IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings., 8050960, Institute of Electrical and Electronics Engineers Inc., 50th IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, United States, 5/28/17. https://doi.org/10.1109/ISCAS.2017.8050960

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A multi-phase VCO quantizer based adaptive digital LDO in 65nm CMOS technology

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