@inproceedings{46d471a1a7ca46aebcc46f62a75dc32f,
title = "A sub-0.9V logic-compatible embedded DRAM with boosted 3T gain cell, regulated bit-line write scheme and PVT-tracking read reference bias",
abstract = "Circuit techniques for enabling a sub-0.9V logic-compatible embedded DRAM (eDRAM) are presented. A boosted 3T gain cell increases read margin, enhances read speed and improves data retention time. A regulated bit-line write scheme and a read reference bias generator are proposed to cope with write disturbance issues and PVT variations. Measurement results from a 64kb eDRAM test chip implemented in a 65nm low-leakage CMOS process demonstrate the effectiveness of the proposed techniques.",
author = "Chun, {Ki Chul} and Pulkit Jain and Lee, {Jung Hwa} and Kim, {Chris H.}",
year = "2009",
month = nov,
day = "18",
language = "English (US)",
isbn = "9784863480018",
series = "IEEE Symposium on VLSI Circuits, Digest of Technical Papers",
pages = "134--135",
booktitle = "2009 Symposium on VLSI Circuits",
note = "2009 Symposium on VLSI Circuits ; Conference date: 16-06-2009 Through 18-06-2009",
}