TY - GEN
T1 - Accurate estimation of global buffer delay within a floorplan
AU - Alpert, Charles J.
AU - Hu, Jiang
AU - Sapatnekar, Sachin S.
AU - Sze, C. N.
PY - 2004
Y1 - 2004
N2 - Closed formed expressions for buffered interconnect delay approximation have been around for some time. However, previous approaches assume that buffers are free to be placed anywhere. In practice, designs frequently have large blocks that make the ideal buffer insertion solution unrealizable. The theory of [12] is extended to show how one can model the blocks into a simple delay estimation technique that applies both to two-pin and to multi-pin nets. Even though the formula uses one buffer type, it shows remarkable accuracy in predicting delay when compared to an optimal realizable buffer insertion solution. Potential applications include wire planning, timing analysis during floorplanning or global routing. Our experiments show that our approach accurately predicts delay when compared to constructing an realizable buffer insertion with multiple buffer types.
AB - Closed formed expressions for buffered interconnect delay approximation have been around for some time. However, previous approaches assume that buffers are free to be placed anywhere. In practice, designs frequently have large blocks that make the ideal buffer insertion solution unrealizable. The theory of [12] is extended to show how one can model the blocks into a simple delay estimation technique that applies both to two-pin and to multi-pin nets. Even though the formula uses one buffer type, it shows remarkable accuracy in predicting delay when compared to an optimal realizable buffer insertion solution. Potential applications include wire planning, timing analysis during floorplanning or global routing. Our experiments show that our approach accurately predicts delay when compared to constructing an realizable buffer insertion with multiple buffer types.
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U2 - 10.1109/ICCAD.2004.1382667
DO - 10.1109/ICCAD.2004.1382667
M3 - Conference contribution
AN - SCOPUS:16244382538
SN - 0780387023
T3 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
SP - 706
EP - 711
BT - ICCAD-2004 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
T2 - ICCAD-2004 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
Y2 - 7 November 2004 through 11 November 2004
ER -