Abstract
This paper presents an efficient VLSI architecture of the 2-D wavelet transform for the adaptive directional lifting (ADL) scheme in image coding. To avoid accumulating errors from irrational wavelet transform coefficients, algebraic integers with appropriate input scaling parameters are used. A two-parallel architecture with zigzag processing of the image stream is used to increase the throughput. In a 45-nm CMOS technology, the synthesis results indicate that the proposed architectures for the Daub-4 and 5/3 wavelets can operate at a clock frequency of about 250 MHz with an estimated throughput of 4 Gb/s.
Original language | English (US) |
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Pages (from-to) | 551-559 |
Number of pages | 9 |
Journal | Journal of Signal Processing Systems |
Volume | 91 |
Issue number | 5 |
DOIs | |
State | Published - May 15 2019 |
Bibliographical note
Funding Information:This work was supported by the State Key Laboratory of ASIC & System, grant no. 2016GF010.
Publisher Copyright:
© 2018, Springer Science+Business Media, LLC, part of Springer Nature.
Keywords
- Adaptive directional lifting
- Algebraic integers
- Image coding
- Image compression
- Lifting wavelet transform