This paper presents a novel four-channel, four-beam receiver core based on a FFT core that is easily extended to a larger number of beams. This architecture is particulary well suited for MIMO systems where multiple beams are used for increased throughput. Like the FFT, the proposed architecture reuses computations for multi-beam systems. In particular, the proposed architecture redistributes the computations so as to maximize the reuse of the structure that already exist in a receiver chain. In many fashions the architecture is quite similar to a Butler matrix but unlike the Butler matrix it does not use large passive components at RF. Further, we exploit the normally occurring quadrature down-conversion process to implement the tap weights. In comparison to traditional MIMO architectures, that effectively duplicate each path, the distributed computations of this architecture provide partial spatial filtering before the final stage, improving interference rejection for the blocks between the LNA and the ADC. Additionally, because of the spatial filtering prior to the ADC, a single interferer only jams a single beam allowing for continued operation though at a lower combined throughput. The four-beam receiver core prototype in 65nm CMOS implements the basic FFT based architecture but does not include an LNA or extensive IF stages. This four-channel design consumes 56mW power and occupies an active area of 0.65mm2 excluding pads and test circuits.