Abstract
Cache coherence enforcement and memory latency reduction and hiding are very important and challenging problems in the design of large-scale distributed shared-memory (DSM) multiprocessors. We pro- pose an integrated approach to solve these problems through a compiler- directed cache coherence scheme called the Cache Coherence with Data Prefetching (CCDP) scheme. The CCDP scheme enforces cache coher- ence by prefetching the potentially-stale references in a parallel program. It also prefetches the non-stale references to hide their memory latencies. To optimize the performance of the CCDP scheme, some prefetch hard- ware support is provided to eficiently handle these two forms of data prefetching operations. We also developed the compiler techniques uti- lized by the CCDP scheme for stale reference detection, prefetch target analysis and prefetch scheduling. We evaluated the performance of the CCDP scheme via execution-driven simulations of several applications from the SPEC CFP95 and CFP92 benchmark suites. The simulation results show that the CCDP scheme provides significant performance improvements for the benchmark programs studied.
Original language | English (US) |
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Title of host publication | Languages and Compilers for Parallel Computing - 11th International Workshop, LCPC 1998, Proceedings |
Editors | Siddhartha Chatterjee, Jan F. Prins, Larry Carter, Jeanne Ferrante, Zhiyuan Li, David Sehr, Pen-Chung Yew |
Publisher | Springer Verlag |
Pages | 51-67 |
Number of pages | 17 |
ISBN (Print) | 3540664262, 9783540664260 |
DOIs | |
State | Published - 1999 |
Event | 11th International Workshop on Languages and Compilers for Parallel Computing, LCPC 1998 - Chapel Hill, United States Duration: Aug 7 1998 → Aug 9 1998 |
Publication series
Name | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
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Volume | 1656 |
ISSN (Print) | 0302-9743 |
ISSN (Electronic) | 1611-3349 |
Other
Other | 11th International Workshop on Languages and Compilers for Parallel Computing, LCPC 1998 |
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Country/Territory | United States |
City | Chapel Hill |
Period | 8/7/98 → 8/9/98 |
Bibliographical note
Publisher Copyright:© Springer-Verlag Berlin Heidelberg 1999.
Keywords
- Compiler-directed cache coherence
- Data prefetching
- Memory latency hiding
- Shared-memory multiprocessors