An SVA hardware monitor with off-line replay

Minwoo Nho, Xiaofang Zhou, Gerald E. Sobelman

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

With the help of assertion based verification, engineers nowadays can check a digital design against its specification more easily and precisely. What's more, assertion descriptions can be synthesized into hardware, which makes post-fab on-line monitor possible. But most of the paper does not consider waveform capture and off-line replay features that can help engineers further analyze captured waveforms. In this paper, an assertion based hardware monitor with off-line replay is presented. Its SAV to RTL generator is described.

Original languageEnglish (US)
Title of host publication2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings
EditorsYu-Long Jiang, Ting-Ao Tang, Ru Huang
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1612-1614
Number of pages3
ISBN (Electronic)9781467397179
DOIs
StatePublished - 2016
Externally publishedYes
Event13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Hangzhou, China
Duration: Oct 25 2016Oct 28 2016

Publication series

Name2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings

Other

Other13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016
Country/TerritoryChina
CityHangzhou
Period10/25/1610/28/16

Bibliographical note

Publisher Copyright:
© 2016 IEEE.

Keywords

  • Assertion
  • Off-line replay
  • On-line Monitor
  • SVA Compiler

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