Analog design retargeting by design knowledge reuse and circuit synthesis

M. Webb, Hua Tang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

In this paper, we present an empirical method for efficient analog design retargeting by combining design knowledge reuse and circuit synthesis. The method first decomposes the source system into circuit blocks and extracts the performance parameter specifications of each circuit block. Then, it scales each circuit block and defines a design space in the target technology. Subsequently, each circuit block is synthesized. Our assumption is that if the synthesized circuit blocks retain the same set of performance specifications, then the overall system after retargeting would have the same performance specification as the source system. We experiment the method on a fourth order continuous-time Delta-Sigma modulator.

Original languageEnglish (US)
Title of host publication2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Pages892-895
Number of pages4
DOIs
StatePublished - 2008
Event2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 - Seattle, WA, United States
Duration: May 18 2008May 21 2008

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Other

Other2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Country/TerritoryUnited States
CitySeattle, WA
Period5/18/085/21/08

Keywords

  • Analog circuit synthesis
  • Delta-Sigma modulators
  • Optimization
  • Technology retargeting

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