Analyzing the electromigration effects on different metal layers and different wire lengths

Gracidi Posser, Vivek Mishra, Ricardo Reis, Sachin S Sapatnekar

Research output: Chapter in Book/Report/Conference proceedingConference contribution

14 Scopus citations

Abstract

Electromigration (EM) is a significant problem in integrated circuits and can seriously damage interconnect wires and vias, reducing the circuit's lifetime. In this paper we are simulating the EM effects on 6 different metal layers for different wire lengths incorporating Joule heating effects. The layouts are constructed considering the 45nm technology and scaled to 22nm technology. We are simulating the EM effects considering three different wire lengths, 100μm, 200μm and 300μm in 22nm technology for a reference frequency of 2GHz. The delay is also analyzed and it increases when the wire length increases and decreases for a higher metal layer.

Original languageEnglish (US)
Title of host publication2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages682-685
Number of pages4
ISBN (Electronic)9781479942428
DOIs
StatePublished - Jan 1 2014
Event2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014 - Marseille, France
Duration: Dec 7 2014Dec 10 2014

Publication series

Name2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014

Other

Other2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014
Country/TerritoryFrance
CityMarseille
Period12/7/1412/10/14

Keywords

  • AC Electromigration
  • Electromigration
  • Physical Design
  • Signal Wires

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