Carrier mobility enhancement in strained Si-On-Insulator fabricated by wafer bonding

L. J. Huang; J. O. Chu; S. Goma; C. P. D'Emic; S. J. Koester; D. F. Canaperi; P. M. Mooney; S. A. Cordes; J. L. Speidell; R. M. Anderson; H. S. Philip Wong

Carrier mobility enhancement in strained Si-On-Insulator fabricated by wafer bonding

L. J. Huang, J. O. Chu, S. Goma, C. P. D'Emic, S. J. Koester, D. F. Canaperi, P. M. Mooney, S. A. Cordes, J. L. Speidell, R. M. Anderson, H. S. Philip Wong

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

41 Scopus citations

Abstract

N- and p-MOSFETs have been fabricated in strained Si on SiGe on insulator (SSOI) with high (15-25%) Ge content. Wafer bonding and H-induced layer transfer techniques enabled the fabrication of the high Ge content SiGe-On-Insulator (SGOI) substrates. Mobility enhancement of 46% for electrons and 60-80% for holes (for 20%-25% Ge content, respectively) has been demonstrated in SSOI MOSFETs. This could lead to next generation device performance enhancement.

Original language	English (US)
Title of host publication	IEEE Symposium on VLSI Circuits, Digest of Technical Papers
Pages	57-58
Number of pages	2
Edition	TECHNOLOGY SYMP.
State	Published - Jan 1 2001
Event	2001 VLSI Technology Symposium - Kyoto, Japan Duration: Jun 12 2001 → Jun 14 2001

Other

Other	2001 VLSI Technology Symposium
Country/Territory	Japan
City	Kyoto
Period	6/12/01 → 6/14/01

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Huang, LJ, Chu, JO, Goma, S, D'Emic, CP, Koester, SJ, Canaperi, DF, Mooney, PM, Cordes, SA, Speidell, JL, Anderson, RM & Philip Wong, HS 2001, Carrier mobility enhancement in strained Si-On-Insulator fabricated by wafer bonding. in IEEE Symposium on VLSI Circuits, Digest of Technical Papers. TECHNOLOGY SYMP. edn, pp. 57-58, 2001 VLSI Technology Symposium, Kyoto, Japan, 6/12/01.

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title = "Carrier mobility enhancement in strained Si-On-Insulator fabricated by wafer bonding",

abstract = "N- and p-MOSFETs have been fabricated in strained Si on SiGe on insulator (SSOI) with high (15-25%) Ge content. Wafer bonding and H-induced layer transfer techniques enabled the fabrication of the high Ge content SiGe-On-Insulator (SGOI) substrates. Mobility enhancement of 46% for electrons and 60-80% for holes (for 20%-25% Ge content, respectively) has been demonstrated in SSOI MOSFETs. This could lead to next generation device performance enhancement.",

author = "Huang, {L. J.} and Chu, {J. O.} and S. Goma and D'Emic, {C. P.} and Koester, {S. J.} and Canaperi, {D. F.} and Mooney, {P. M.} and Cordes, {S. A.} and Speidell, {J. L.} and Anderson, {R. M.} and {Philip Wong}, {H. S.}",

year = "2001",

month = jan,

day = "1",

language = "English (US)",

pages = "57--58",

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T1 - Carrier mobility enhancement in strained Si-On-Insulator fabricated by wafer bonding

AU - Huang, L. J.

AU - Chu, J. O.

AU - Goma, S.

AU - D'Emic, C. P.

AU - Koester, S. J.

AU - Canaperi, D. F.

AU - Mooney, P. M.

AU - Cordes, S. A.

AU - Speidell, J. L.

AU - Anderson, R. M.

AU - Philip Wong, H. S.

PY - 2001/1/1

Y1 - 2001/1/1

N2 - N- and p-MOSFETs have been fabricated in strained Si on SiGe on insulator (SSOI) with high (15-25%) Ge content. Wafer bonding and H-induced layer transfer techniques enabled the fabrication of the high Ge content SiGe-On-Insulator (SGOI) substrates. Mobility enhancement of 46% for electrons and 60-80% for holes (for 20%-25% Ge content, respectively) has been demonstrated in SSOI MOSFETs. This could lead to next generation device performance enhancement.

AB - N- and p-MOSFETs have been fabricated in strained Si on SiGe on insulator (SSOI) with high (15-25%) Ge content. Wafer bonding and H-induced layer transfer techniques enabled the fabrication of the high Ge content SiGe-On-Insulator (SGOI) substrates. Mobility enhancement of 46% for electrons and 60-80% for holes (for 20%-25% Ge content, respectively) has been demonstrated in SSOI MOSFETs. This could lead to next generation device performance enhancement.

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M3 - Conference contribution

AN - SCOPUS:0034785110

SP - 57

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BT - IEEE Symposium on VLSI Circuits, Digest of Technical Papers

T2 - 2001 VLSI Technology Symposium

Y2 - 12 June 2001 through 14 June 2001

ER -

Carrier mobility enhancement in strained Si-On-Insulator fabricated by wafer bonding

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