Circuit delay variability due to wire resistance evolution under AC electromigration

Vivek Mishra; Sachin S. Sapatnekar

doi:10.1109/IRPS.2015.7112713

Circuit delay variability due to wire resistance evolution under AC electromigration

Vivek Mishra, Sachin S. Sapatnekar

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

10 Scopus citations

Abstract

Electromigration (EM) in signal interconnects can induce voids, and the evolution of these voids may cause the wire resistance to increase with time. Previous approaches use the mean time to failure metric based either on a fixed resistance increase or open circuit failure criterion. This work shows that even noncatastrophic EM on critical paths may cause performance degradation, resulting in incorrect circuit operation. HSPICE-based Monte Carlo simulations on a set of on-chip structures are performed to quantify the impact of EM on circuit performance degradation.

Original language	English (US)
Title of host publication	2015 IEEE International Reliability Physics Symposium, IRPS 2015
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	3D31-3D37
ISBN (Electronic)	9781467373623
DOIs	https://doi.org/10.1109/IRPS.2015.7112713
State	Published - May 26 2015
Event	IEEE International Reliability Physics Symposium, IRPS 2015 - Monterey, United States Duration: Apr 19 2015 → Apr 23 2015

Publication series

Name	IEEE International Reliability Physics Symposium Proceedings
Volume	2015-May
ISSN (Print)	1541-7026

Other

Other	IEEE International Reliability Physics Symposium, IRPS 2015
Country/Territory	United States
City	Monterey
Period	4/19/15 → 4/23/15

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

Keywords

AC EM analysis
clock skew
delay
technology scaling

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10.1109/IRPS.2015.7112713

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Mishra, V., & Sapatnekar, S. S. (2015). Circuit delay variability due to wire resistance evolution under AC electromigration. In 2015 IEEE International Reliability Physics Symposium, IRPS 2015 (pp. 3D31-3D37). Article 7112713 (IEEE International Reliability Physics Symposium Proceedings; Vol. 2015-May). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IRPS.2015.7112713

Circuit delay variability due to wire resistance evolution under AC electromigration. / Mishra, Vivek; Sapatnekar, Sachin S.
2015 IEEE International Reliability Physics Symposium, IRPS 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 3D31-3D37 7112713 (IEEE International Reliability Physics Symposium Proceedings; Vol. 2015-May).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Mishra, V & Sapatnekar, SS 2015, Circuit delay variability due to wire resistance evolution under AC electromigration. in 2015 IEEE International Reliability Physics Symposium, IRPS 2015., 7112713, IEEE International Reliability Physics Symposium Proceedings, vol. 2015-May, Institute of Electrical and Electronics Engineers Inc., pp. 3D31-3D37, IEEE International Reliability Physics Symposium, IRPS 2015, Monterey, United States, 4/19/15. https://doi.org/10.1109/IRPS.2015.7112713

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Circuit delay variability due to wire resistance evolution under AC electromigration

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