Abstract
Efficiently maintaining cache coherence is a major problem in large-scale shared memory multiprocessors. Hardware directory schemes have very high memory requirements, while software-directed schemes must rely on imprecise compile-time memory disambiguation. Recently proposed dynamic directory schemes allocate pointers to blocks only as they are referenced, which significantly reduces their memory requirements, but they still allocate pointers to blocks that do not need them. We show how compiler marking can further reduce the directory size by allocating pointers only when necessary. Using trace-driven simulations, we find that the performance of this new approach is comparable to other coherence schemes, but with significantly lower memory requirements.
| Original language | English (US) |
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| Title of host publication | ICS 1991 - Proceedings of the 5th International Conference on Supercomputing |
| Editors | Edward S. Davidson, Friedel Hossfield |
| Publisher | Association for Computing Machinery |
| Pages | 274-283 |
| Number of pages | 10 |
| ISBN (Print) | 0897914341, 9780897914345 |
| DOIs | |
| State | Published - Jun 1 1991 |
| Externally published | Yes |
| Event | 5th International Conference on Supercomputing, ICS 1991 - Cologne, Germany Duration: Jun 17 1991 → Jun 21 1991 |
Publication series
| Name | Proceedings of the International Conference on Supercomputing |
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Other
| Other | 5th International Conference on Supercomputing, ICS 1991 |
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| Country/Territory | Germany |
| City | Cologne |
| Period | 6/17/91 → 6/21/91 |
Bibliographical note
Funding Information:This work was supported by the National Science Foundation under Grant No. NSF MIP-S41011O, with additional support from NASA Ames Research Center Grant No. NASA NCC 2-559 (DARPA), National Science Foundation Grant No. NSF MIP-88-07775, and Department of Energy Grant No. DOE DEFG02-85ER25001. David Lilja also is supported by a DARPA/NASA Assistantship in Parallel Processing.
Publisher Copyright:
© 1991 ACM.