Comparison and analysis of phase noise in ring oscillators

Liang Dai, Ramesh Harjani

Research output: Contribution to journalConference articlepeer-review

10 Scopus citations

Abstract

Voltage-controlled oscillators are widely used circuit blocks, particularly in phase-locked loops. As CMOS is the technology of choice for many applications, CMOS oscillators with low phase noise and timing jitter are highly desired. CMOS ring oscillators with five different delay cell topologies have been designed, fabricated and evaluated for phase noise performance. Our results show that ring oscillators with linear loads provide much better phase noise performance than oscillators with nonlinear loads. We also observe that well designed single-ended oscillators have phase noise that is on par or better than oscillators with fully differential delay stages. Both our analysis and measurement results suggest that large signal voltage swing and improved linearity of the delay cells help reduce oscillator phase noise.

Original languageEnglish (US)
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume5
StatePublished - Jan 1 2000
EventProceedings of the IEEE 2000 Internaitonal Symposium on Circuits and Systems - Geneva, Switz
Duration: May 28 2000May 31 2000

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