Design of PVT tolerant inverter based circuits for low supply voltages

Ramesh Harjani; Rakesh Kumar Palani

doi:10.1109/CICC.2015.7338424

Design of PVT tolerant inverter based circuits for low supply voltages

Ramesh Harjani, Rakesh Kumar Palani

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

8 Scopus citations

Abstract

The design of differential pair based OTAs is becoming increasingly difficult in finer geometries due to lower supply voltages. Inverter based designs have proven to have better transconductance efficiency, higher swing and better linearity but have degraded CMRR, worse PSRR and limited PVT tolerance. In this tutorial, we discuss traditional amplifiers and why inverter based amplifiers are better suited for lower supplies. We then describe the design procedure for inverter based OTA designs with an emphasis on improving their performance, including PVT tolerance, CMRR and PSRR. In particular, we introduce new biasing techniques for inverters to improve their PVT tolerance. We finally validate our designs using measurement results from a number of fabricated designs.

Original language	English (US)
Title of host publication	2015 IEEE Custom Integrated Circuits Conference, CICC 2015
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781479986828
DOIs	https://doi.org/10.1109/CICC.2015.7338424
State	Published - Nov 25 2015
Event	IEEE Custom Integrated Circuits Conference, CICC 2015 - San Jose, United States Duration: Sep 28 2015 → Sep 30 2015

Publication series

Name	Proceedings of the Custom Integrated Circuits Conference
Volume	2015-November
ISSN (Print)	0886-5930

Other

Other	IEEE Custom Integrated Circuits Conference, CICC 2015
Country/Territory	United States
City	San Jose
Period	9/28/15 → 9/30/15

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Publisher Copyright:
© 2015 IEEE.

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10.1109/CICC.2015.7338424

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Design of PVT tolerant inverter based circuits for low supply voltages. / Harjani, Ramesh; Palani, Rakesh Kumar.
2015 IEEE Custom Integrated Circuits Conference, CICC 2015. Institute of Electrical and Electronics Engineers Inc., 2015. 7338424 (Proceedings of the Custom Integrated Circuits Conference; Vol. 2015-November).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Harjani, R & Palani, RK 2015, Design of PVT tolerant inverter based circuits for low supply voltages. in 2015 IEEE Custom Integrated Circuits Conference, CICC 2015., 7338424, Proceedings of the Custom Integrated Circuits Conference, vol. 2015-November, Institute of Electrical and Electronics Engineers Inc., IEEE Custom Integrated Circuits Conference, CICC 2015, San Jose, United States, 9/28/15. https://doi.org/10.1109/CICC.2015.7338424

@inproceedings{6a3d64719e9040b28b9bf6ca03405f29,

title = "Design of PVT tolerant inverter based circuits for low supply voltages",

abstract = "The design of differential pair based OTAs is becoming increasingly difficult in finer geometries due to lower supply voltages. Inverter based designs have proven to have better transconductance efficiency, higher swing and better linearity but have degraded CMRR, worse PSRR and limited PVT tolerance. In this tutorial, we discuss traditional amplifiers and why inverter based amplifiers are better suited for lower supplies. We then describe the design procedure for inverter based OTA designs with an emphasis on improving their performance, including PVT tolerance, CMRR and PSRR. In particular, we introduce new biasing techniques for inverters to improve their PVT tolerance. We finally validate our designs using measurement results from a number of fabricated designs.",

author = "Ramesh Harjani and Palani, {Rakesh Kumar}",

note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; IEEE Custom Integrated Circuits Conference, CICC 2015 ; Conference date: 28-09-2015 Through 30-09-2015",

year = "2015",

month = nov,

day = "25",

doi = "10.1109/CICC.2015.7338424",

language = "English (US)",

series = "Proceedings of the Custom Integrated Circuits Conference",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2015 IEEE Custom Integrated Circuits Conference, CICC 2015",

}

TY - GEN

T1 - Design of PVT tolerant inverter based circuits for low supply voltages

AU - Harjani, Ramesh

AU - Palani, Rakesh Kumar

PY - 2015/11/25

Y1 - 2015/11/25

N2 - The design of differential pair based OTAs is becoming increasingly difficult in finer geometries due to lower supply voltages. Inverter based designs have proven to have better transconductance efficiency, higher swing and better linearity but have degraded CMRR, worse PSRR and limited PVT tolerance. In this tutorial, we discuss traditional amplifiers and why inverter based amplifiers are better suited for lower supplies. We then describe the design procedure for inverter based OTA designs with an emphasis on improving their performance, including PVT tolerance, CMRR and PSRR. In particular, we introduce new biasing techniques for inverters to improve their PVT tolerance. We finally validate our designs using measurement results from a number of fabricated designs.

AB - The design of differential pair based OTAs is becoming increasingly difficult in finer geometries due to lower supply voltages. Inverter based designs have proven to have better transconductance efficiency, higher swing and better linearity but have degraded CMRR, worse PSRR and limited PVT tolerance. In this tutorial, we discuss traditional amplifiers and why inverter based amplifiers are better suited for lower supplies. We then describe the design procedure for inverter based OTA designs with an emphasis on improving their performance, including PVT tolerance, CMRR and PSRR. In particular, we introduce new biasing techniques for inverters to improve their PVT tolerance. We finally validate our designs using measurement results from a number of fabricated designs.

UR - http://www.scopus.com/inward/record.url?scp=84959199045&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84959199045&partnerID=8YFLogxK

U2 - 10.1109/CICC.2015.7338424

DO - 10.1109/CICC.2015.7338424

M3 - Conference contribution

AN - SCOPUS:84959199045

T3 - Proceedings of the Custom Integrated Circuits Conference

BT - 2015 IEEE Custom Integrated Circuits Conference, CICC 2015

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - IEEE Custom Integrated Circuits Conference, CICC 2015

Y2 - 28 September 2015 through 30 September 2015

ER -

Design of PVT tolerant inverter based circuits for low supply voltages

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