Design techniques for pulsed static CMOS

Kavitha Seshadri; Adrianne Pontarelli; Gauri Joglekar; Gerald E Sobelman

Design techniques for pulsed static CMOS

Kavitha Seshadri, Adrianne Pontarelli, Gauri Joglekar, Gerald E Sobelman

Electrical and Computer Engineering

Research output: Contribution to journal › Conference article › peer-review

Abstract

This paper gives new results in the design of Pulsed Static CMOS circuits. In particular, a new method of circuit duplication has been proposed which is particularly useful for the implementation of arithmetic functions. An array multiplier and a carry-select adder are used as representative design examples. Simulation results confirm that these Pulsed Static CMOS circuits operate correctly and have greater throughput than traditional static designs.

Original language	English (US)
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2
State	Published - Sep 7 2004
Event	2004 IEEE International Symposium on Cirquits and Systems - Proceedings - Vancouver, BC, Canada Duration: May 23 2004 → May 26 2004

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title = "Design techniques for pulsed static CMOS",

abstract = "This paper gives new results in the design of Pulsed Static CMOS circuits. In particular, a new method of circuit duplication has been proposed which is particularly useful for the implementation of arithmetic functions. An array multiplier and a carry-select adder are used as representative design examples. Simulation results confirm that these Pulsed Static CMOS circuits operate correctly and have greater throughput than traditional static designs.",

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year = "2004",

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AU - Joglekar, Gauri

AU - Sobelman, Gerald E

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N2 - This paper gives new results in the design of Pulsed Static CMOS circuits. In particular, a new method of circuit duplication has been proposed which is particularly useful for the implementation of arithmetic functions. An array multiplier and a carry-select adder are used as representative design examples. Simulation results confirm that these Pulsed Static CMOS circuits operate correctly and have greater throughput than traditional static designs.

AB - This paper gives new results in the design of Pulsed Static CMOS circuits. In particular, a new method of circuit duplication has been proposed which is particularly useful for the implementation of arithmetic functions. An array multiplier and a carry-select adder are used as representative design examples. Simulation results confirm that these Pulsed Static CMOS circuits operate correctly and have greater throughput than traditional static designs.

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AN - SCOPUS:4344654099

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T2 - 2004 IEEE International Symposium on Cirquits and Systems - Proceedings

Y2 - 23 May 2004 through 26 May 2004

ER -

Design techniques for pulsed static CMOS

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