Digit-serial DSP library for optimized FPGA configuration

Hanho Lee; G. E. Sobelman

doi:10.1109/FPGA.1998.707936

Digit-serial DSP library for optimized FPGA configuration

Hanho Lee, G. E. Sobelman

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

5 Scopus citations

Abstract

This paper gives the digit-serial DSP libraries used to implement the digit-serial DSP architecture for field programmable gate arrays (FPGAs) and compares schematic-based FPGA design with design based on logic synthesis for digit-serial DSP libraries. It describes the design of digit-serial addition/subtraction, multiplication and delay elements and indicates also how digit-serial FIR filter can be implemented. The FPGA device utilization and critical path delay of digit-serial DSP libraries are calculated and described.

Original language	English (US)
Title of host publication	Proceedings - IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 1998
Editors	Kenneth L. Pocek, Jeffrey M. Arnold
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1-2
Number of pages	2
ISBN (Electronic)	0818689005, 9780818689000
DOIs	https://doi.org/10.1109/FPGA.1998.707936
State	Published - 1998
Externally published	Yes
Event	1998 IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 1998 - Napa Valley, United States Duration: Apr 15 1998 → Apr 17 1998

Publication series

Name	Proceedings - IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 1998
Volume	1998-April

Conference

Conference	1998 IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 1998
Country/Territory	United States
City	Napa Valley
Period	4/15/98 → 4/17/98

Bibliographical note

Funding Information:
This research was supported by Defense Advanced Research Project Agency under contract number DA/DABT63-96-C-0050. We would like to thank Keshab Parhi for valuable conversations.

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10.1109/FPGA.1998.707936

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Lee, H., & Sobelman, G. E. (1998). Digit-serial DSP library for optimized FPGA configuration. In K. L. Pocek, & J. M. Arnold (Eds.), Proceedings - IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 1998 (pp. 1-2). (Proceedings - IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 1998; Vol. 1998-April). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/FPGA.1998.707936

Digit-serial DSP library for optimized FPGA configuration. / Lee, Hanho; Sobelman, G. E.
Proceedings - IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 1998. ed. / Kenneth L. Pocek; Jeffrey M. Arnold. Institute of Electrical and Electronics Engineers Inc., 1998. p. 1-2 (Proceedings - IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 1998; Vol. 1998-April).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Lee, H & Sobelman, GE 1998, Digit-serial DSP library for optimized FPGA configuration. in KL Pocek & JM Arnold (eds), Proceedings - IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 1998. Proceedings - IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 1998, vol. 1998-April, Institute of Electrical and Electronics Engineers Inc., pp. 1-2, 1998 IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 1998, Napa Valley, United States, 4/15/98. https://doi.org/10.1109/FPGA.1998.707936

Lee H, Sobelman GE. Digit-serial DSP library for optimized FPGA configuration. In Pocek KL, Arnold JM, editors, Proceedings - IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 1998. Institute of Electrical and Electronics Engineers Inc. 1998. p. 1-2. (Proceedings - IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 1998). doi: 10.1109/FPGA.1998.707936

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Digit-serial DSP library for optimized FPGA configuration

Abstract

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Bibliographical note

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