Optimization problems are commonplace across energy, manufacturing, and communication industries. Efforts across academia are largely centered on theoretical properties and solution algorithms for optimization problems. Limited attention has been paid to systematically address challenges involved in implementing algorithms on end-use hardware platforms that are typically resource and power constrained. Through this paper, we seek to uncover the link between algorithmic considerations (e.g., convergence, precision) and hardware resources (e.g., memory utilization, gate usage) when optimization problems are deployed on general-purpose microcontrollers: a class of embedded systems with low power consumption and high configurability. Without loss of generality, we focus our attention on first-order optimization methods implemented on the popular MSP430 microcontroller architecture. We outline a strategy to architect bespoke microcontrollers that are optimized to improve cost, power, and other performance metrics for a particular algorithm. In so doing, we take a critical step in bridging the gap between theoretical properties of optimization problems, algorithmic considerations in algorithms, and design goals for computer architecture.
|Original language||English (US)|
|Title of host publication||Conference Record - 53rd Asilomar Conference on Circuits, Systems and Computers, ACSSC 2019|
|Editors||Michael B. Matthews|
|Publisher||IEEE Computer Society|
|Number of pages||5|
|State||Published - Nov 2019|
|Event||53rd Asilomar Conference on Circuits, Systems and Computers, ACSSC 2019 - Pacific Grove, United States|
Duration: Nov 3 2019 → Nov 6 2019
|Name||Conference Record - Asilomar Conference on Signals, Systems and Computers|
|Conference||53rd Asilomar Conference on Circuits, Systems and Computers, ACSSC 2019|
|Period||11/3/19 → 11/6/19|
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© 2019 IEEE.