In this chapter we present a 0.7 V low power LNA which combines a 1:3 frontend balun with dual-path noise and nonlinearity cancellation for improved noise performance at low powers. In traditional noise cancellation techniques only the noise of the main path is cancelled while the noise of the auxiliary path is reduced by using higher power. In the proposed design, the noise and nonlinearity of both the main and the auxiliary paths are mutually cancelled allowing for low power operation. The 2.8 dB NF, − 10.7 dBm IIP3 LNA in TSMC’s 65 nm GP process consumes 475 μW of power resulting in an FOM of 28.8 dB which is 8.2 dB better than the state of the art.
|Original language||English (US)|
|Title of host publication||Analog Circuits and Signal Processing|
|Number of pages||16|
|State||Published - 2020|
|Name||Analog Circuits and Signal Processing|
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- Low power
- Noise cancellation