Effect of finite word-length on SqNr, area and power for real-valued serial FFT

Nanda K. Unnikrishnan, Mario Garrido, Keshab K. Parhi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Modern applications for DSP systems are increasingly constrained by tight area and power requirements. Therefore, it is imperative to analyze effective strategies that work within these requirements. This paper studies the impact of finite word-length arithmetic on the signal to quantization noise ratio (SQNR), power and area for a real-valued serial FFT implementation. An experiment is set up using a hardware description language (HDL) to empirically determine the tradeoffs associated with the following parameters: (i) the input word-length, (ii) the word-length of the rotation coefficients, and (iii) length of the FFT on performance (SQNR), power and area. The results of this paper can be used to make design decisions by careful selection of word-length to achieve a reduction in area and power for an acceptable loss in SQNR.

Original languageEnglish (US)
Title of host publication2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728103976
DOIs
StatePublished - 2019
Event2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Sapporo, Japan
Duration: May 26 2019May 29 2019

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2019-May
ISSN (Print)0271-4310

Conference

Conference2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
Country/TerritoryJapan
CitySapporo
Period5/26/195/29/19

Bibliographical note

Funding Information:
This research was supported in part by the National Science Foundation under grant number CCF-1814759.

Publisher Copyright:
© 2019 IEEE

Keywords

  • Area
  • FFT
  • Power
  • Real-valued FFT
  • Serial commutator
  • SQNR

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