Electron and hole mobility enhancement in strained SOI by wafer bonding

Lijuan Huang; Jack O. Chu; S. A. Goma; C. P. D'Emic; Steven J. Koester; Donald F. Canaperi; Patricia M. Mooney; S. A. Cordes; James L. Speidell; R. M. Anderson; H. S.Philip Wong

doi:10.1109/TED.2002.802675

Electron and hole mobility enhancement in strained SOI by wafer bonding

Lijuan Huang, Jack O. Chu, S. A. Goma, C. P. D'Emic, Steven J. Koester, Donald F. Canaperi, Patricia M. Mooney, S. A. Cordes, James L. Speidell, R. M. Anderson, H. S.Philip Wong

Electrical and Computer Engineering

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Abstract

N-and p-MOSFETs have been fabricated in strained Si-on-SiGe-on-insulator (SSOI) with high (15-25%) Ge content. Wafer bonding and H-induced layer transfer techniques enabled the fabrication of the high Ge content SiGe-on-insulator (SGOI) substrates. Mobility enhancement of 50% for electrons (with 15% Ge) and 15-20% for holes (with 20-25% Ge) has been demonstrated in SSOI MOSFETs. These mobility enhancements are commensurate with those reported for FETs fabricated on strained silicon on bulk SiGe substrates.

Original language	English (US)
Pages (from-to)	1566-1571
Number of pages	6
Journal	IEEE Transactions on Electron Devices
Volume	49
Issue number	9
DOIs	https://doi.org/10.1109/TED.2002.802675
State	Published - Sep 2002

Keywords

CMOS
Mobility
SiGe
Silicon-on-insulator (SOI)
Strained silicon
Wafer bending

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title = "Electron and hole mobility enhancement in strained SOI by wafer bonding",

abstract = "N-and p-MOSFETs have been fabricated in strained Si-on-SiGe-on-insulator (SSOI) with high (15-25%) Ge content. Wafer bonding and H-induced layer transfer techniques enabled the fabrication of the high Ge content SiGe-on-insulator (SGOI) substrates. Mobility enhancement of 50% for electrons (with 15% Ge) and 15-20% for holes (with 20-25% Ge) has been demonstrated in SSOI MOSFETs. These mobility enhancements are commensurate with those reported for FETs fabricated on strained silicon on bulk SiGe substrates.",

keywords = "CMOS, Mobility, SiGe, Silicon-on-insulator (SOI), Strained silicon, Wafer bending",

author = "Lijuan Huang and Chu, {Jack O.} and Goma, {S. A.} and D'Emic, {C. P.} and Koester, {Steven J.} and Canaperi, {Donald F.} and Mooney, {Patricia M.} and Cordes, {S. A.} and Speidell, {James L.} and Anderson, {R. M.} and Wong, {H. S.Philip}",

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T1 - Electron and hole mobility enhancement in strained SOI by wafer bonding

AU - Huang, Lijuan

AU - Chu, Jack O.

AU - Goma, S. A.

AU - D'Emic, C. P.

AU - Koester, Steven J.

AU - Canaperi, Donald F.

AU - Mooney, Patricia M.

AU - Cordes, S. A.

AU - Speidell, James L.

AU - Anderson, R. M.

AU - Wong, H. S.Philip

PY - 2002/9

Y1 - 2002/9

N2 - N-and p-MOSFETs have been fabricated in strained Si-on-SiGe-on-insulator (SSOI) with high (15-25%) Ge content. Wafer bonding and H-induced layer transfer techniques enabled the fabrication of the high Ge content SiGe-on-insulator (SGOI) substrates. Mobility enhancement of 50% for electrons (with 15% Ge) and 15-20% for holes (with 20-25% Ge) has been demonstrated in SSOI MOSFETs. These mobility enhancements are commensurate with those reported for FETs fabricated on strained silicon on bulk SiGe substrates.

AB - N-and p-MOSFETs have been fabricated in strained Si-on-SiGe-on-insulator (SSOI) with high (15-25%) Ge content. Wafer bonding and H-induced layer transfer techniques enabled the fabrication of the high Ge content SiGe-on-insulator (SGOI) substrates. Mobility enhancement of 50% for electrons (with 15% Ge) and 15-20% for holes (with 20-25% Ge) has been demonstrated in SSOI MOSFETs. These mobility enhancements are commensurate with those reported for FETs fabricated on strained silicon on bulk SiGe substrates.

KW - CMOS

KW - Mobility

KW - SiGe

KW - Silicon-on-insulator (SOI)

KW - Strained silicon

KW - Wafer bending

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Electron and hole mobility enhancement in strained SOI by wafer bonding

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Keywords

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