TY - GEN
T1 - Energy efficient signaling in deep submicron CMOS technology
AU - Dhaou, Imed Ben
AU - Sundararajan, Vijay
AU - Tenhunen, Hannu
AU - Parhi, Keshab K
PY - 2001/1/1
Y1 - 2001/1/1
N2 - In this paper we propose an efficient technique for energy savings in DSM technology. The core of this method is based on low-voltage signaling over long on-chip interconnect with repeaters insertion to tolerate DSM noise and to achieve an acceptable delay. We elaborate a heuristic algorithm, called VIJIM, for repeaters insertion. VIJIM algorithm has been implemented to design a robust inverter chain for on-chip signaling using 0.25pm, 2.5V, 6 metal layers CMOS process. An average of 70% of energy-saving has been achieved by reducing the supply voltage from 2.5V down to 1.5V.
AB - In this paper we propose an efficient technique for energy savings in DSM technology. The core of this method is based on low-voltage signaling over long on-chip interconnect with repeaters insertion to tolerate DSM noise and to achieve an acceptable delay. We elaborate a heuristic algorithm, called VIJIM, for repeaters insertion. VIJIM algorithm has been implemented to design a robust inverter chain for on-chip signaling using 0.25pm, 2.5V, 6 metal layers CMOS process. An average of 70% of energy-saving has been achieved by reducing the supply voltage from 2.5V down to 1.5V.
UR - http://www.scopus.com/inward/record.url?scp=84949962439&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84949962439&partnerID=8YFLogxK
U2 - 10.1109/ISQED.2001.915250
DO - 10.1109/ISQED.2001.915250
M3 - Conference contribution
AN - SCOPUS:84949962439
T3 - Proceedings - International Symposium on Quality Electronic Design, ISQED
SP - 319
EP - 324
BT - Proceedings of the IEEE 2001 2nd International Symposium on Quality Electronic Design, ISQED 2001
PB - IEEE Computer Society
T2 - 2nd IEEE International Symposium on Quality Electronic Design, ISQED 2001
Y2 - 26 March 2001 through 28 March 2001
ER -
