A high performance analog technology has been developed for an enhanced 1. 2- mu m VLSI digital CMOS process. Enhancements made in order to attain 10-V analog capabilities included a vertical NPN bipolar transistor, Cr-Si resistors, interpoly oxide capacitors, and an LDD structure on n-channel transistors. Extensive characterization and evaluation of the enhancements are presented which demonstrate the potential of this process for fabricating large-scale data conversion and signal processing circuits. Circuit performance of the digital CMOS has been well preserved with virtually no degradation.
|Original language||English (US)|
|Number of pages||4|
|Journal||Proceedings of the Custom Integrated Circuits Conference|
|State||Published - Dec 1 1985|