ENHANCED FULLY-SCALED 1. 2 mu M CMOS PROCESS FOR ANALOG APPLICATIONS.

R. K. Reich; C. Rahn; M. Holt; J. W. Schrankler; D. H. Ju; G. D. Kirchner

ENHANCED FULLY-SCALED 1. 2 mu M CMOS PROCESS FOR ANALOG APPLICATIONS.

R. K. Reich, C. Rahn, M. Holt, J. W. Schrankler, D. H. Ju, G. D. Kirchner

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Abstract

A high performance analog technology has been developed for an enhanced 1. 2- mu m VLSI digital CMOS process. Enhancements made in order to attain 10-V analog capabilities included a vertical NPN bipolar transistor, Cr-Si resistors, interpoly oxide capacitors, and an LDD structure on n-channel transistors. Extensive characterization and evaluation of the enhancements are presented which demonstrate the potential of this process for fabricating large-scale data conversion and signal processing circuits. Circuit performance of the digital CMOS has been well preserved with virtually no degradation.

Original language	English (US)
Pages (from-to)	192-195
Number of pages	4
Journal	Proceedings of the Custom Integrated Circuits Conference
State	Published - Dec 1 1985

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abstract = "A high performance analog technology has been developed for an enhanced 1. 2- mu m VLSI digital CMOS process. Enhancements made in order to attain 10-V analog capabilities included a vertical NPN bipolar transistor, Cr-Si resistors, interpoly oxide capacitors, and an LDD structure on n-channel transistors. Extensive characterization and evaluation of the enhancements are presented which demonstrate the potential of this process for fabricating large-scale data conversion and signal processing circuits. Circuit performance of the digital CMOS has been well preserved with virtually no degradation.",

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AU - Reich, R. K.

AU - Rahn, C.

AU - Holt, M.

AU - Schrankler, J. W.

AU - Ju, D. H.

AU - Kirchner, G. D.

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N2 - A high performance analog technology has been developed for an enhanced 1. 2- mu m VLSI digital CMOS process. Enhancements made in order to attain 10-V analog capabilities included a vertical NPN bipolar transistor, Cr-Si resistors, interpoly oxide capacitors, and an LDD structure on n-channel transistors. Extensive characterization and evaluation of the enhancements are presented which demonstrate the potential of this process for fabricating large-scale data conversion and signal processing circuits. Circuit performance of the digital CMOS has been well preserved with virtually no degradation.

AB - A high performance analog technology has been developed for an enhanced 1. 2- mu m VLSI digital CMOS process. Enhancements made in order to attain 10-V analog capabilities included a vertical NPN bipolar transistor, Cr-Si resistors, interpoly oxide capacitors, and an LDD structure on n-channel transistors. Extensive characterization and evaluation of the enhancements are presented which demonstrate the potential of this process for fabricating large-scale data conversion and signal processing circuits. Circuit performance of the digital CMOS has been well preserved with virtually no degradation.

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ER -

ENHANCED FULLY-SCALED 1. 2 mu M CMOS PROCESS FOR ANALOG APPLICATIONS.

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