Erratum: A linearized, low phase noise VCO based 25 GHz PLL with autonomic biasing (IEEE Journal of Solid-State Circuits (2013) 48:5 (1138-1150))

Bodhisatwa Sadhu; Mark A. Ferriss; Arun S. Natarajan; Soner Yaldiz; Jean Olivier Plouchart; Alexander V. Rylyakov; Alberto Valdes-Garcia; Benjamin D. Parker; Aydin Babakhani; Scott Reynolds; Xin Li; Larry Pileggi; Ramesh Harjani; Jose A. Tierno; Daniel Friedman

doi:10.1109/JSSC.2013.2263875

Erratum: A linearized, low phase noise VCO based 25 GHz PLL with autonomic biasing (IEEE Journal of Solid-State Circuits (2013) 48:5 (1138-1150))

Bodhisatwa Sadhu, Mark A. Ferriss, Arun S. Natarajan, Soner Yaldiz, Jean Olivier Plouchart, Alexander V. Rylyakov, Alberto Valdes-Garcia, Benjamin D. Parker, Aydin Babakhani, Scott Reynolds, Xin Li, Larry Pileggi, Ramesh Harjani, Jose A. Tierno, Daniel Friedman

Electrical and Computer Engineering

Research output: Contribution to journal › Comment/debate › peer-review

Original language	English (US)
Article number	6519420
Pages (from-to)	1539
Number of pages	1
Journal	IEEE Journal of Solid-State Circuits
Volume	48
Issue number	6
DOIs	https://doi.org/10.1109/JSSC.2013.2263875
State	Published - 2013

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Sadhu, B., Ferriss, M. A., Natarajan, A. S., Yaldiz, S., Plouchart, J. O., Rylyakov, A. V., Valdes-Garcia, A., Parker, B. D., Babakhani, A., Reynolds, S., Li, X., Pileggi, L., Harjani, R., Tierno, J. A., & Friedman, D. (2013). Erratum: A linearized, low phase noise VCO based 25 GHz PLL with autonomic biasing (IEEE Journal of Solid-State Circuits (2013) 48:5 (1138-1150)). IEEE Journal of Solid-State Circuits, 48(6), 1539. Article 6519420. https://doi.org/10.1109/JSSC.2013.2263875

Sadhu, B, Ferriss, MA, Natarajan, AS, Yaldiz, S, Plouchart, JO, Rylyakov, AV, Valdes-Garcia, A, Parker, BD, Babakhani, A, Reynolds, S, Li, X, Pileggi, L, Harjani, R, Tierno, JA & Friedman, D 2013, 'Erratum: A linearized, low phase noise VCO based 25 GHz PLL with autonomic biasing (IEEE Journal of Solid-State Circuits (2013) 48:5 (1138-1150))', IEEE Journal of Solid-State Circuits, vol. 48, no. 6, 6519420, pp. 1539. https://doi.org/10.1109/JSSC.2013.2263875

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author = "Bodhisatwa Sadhu and Ferriss, {Mark A.} and Natarajan, {Arun S.} and Soner Yaldiz and Plouchart, {Jean Olivier} and Rylyakov, {Alexander V.} and Alberto Valdes-Garcia and Parker, {Benjamin D.} and Aydin Babakhani and Scott Reynolds and Xin Li and Larry Pileggi and Ramesh Harjani and Tierno, {Jose A.} and Daniel Friedman",

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AU - Ferriss, Mark A.

AU - Natarajan, Arun S.

AU - Yaldiz, Soner

AU - Plouchart, Jean Olivier

AU - Rylyakov, Alexander V.

AU - Valdes-Garcia, Alberto

AU - Parker, Benjamin D.

AU - Babakhani, Aydin

AU - Reynolds, Scott

AU - Li, Xin

AU - Pileggi, Larry

AU - Harjani, Ramesh

AU - Tierno, Jose A.

AU - Friedman, Daniel

PY - 2013

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JO - IEEE Journal of Solid-State Circuits

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ER -

Erratum: A linearized, low phase noise VCO based 25 GHz PLL with autonomic biasing (IEEE Journal of Solid-State Circuits (2013) 48:5 (1138-1150))

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