TY - GEN
T1 - Feasibility analysis of the fixed-width pulse RZ feedback to reduce clock jitter effects in lowpass continuous-time ΔΣ modulators
AU - Chang, Hairong
AU - Tang, Hua
PY - 2013
Y1 - 2013
N2 - A recently proposed method to reduce clock jitter effects in continuous-time Delta-Sigma modulators is to generate a return-to-zero feedback with a fixed-width pulse for active feedback. In practice, the pulse width is subject to noise effects causing jitter of the pulse width itself. Therefore, jitter of the pulse width, though not the clock, may still degrade the performance of Delta-Sigma modulators. In this brief, we investigate practical feasibility of the method. It is shown that jitter of the pulse width could be conditionally much smaller than that of the clock, which therefore reduces clock jitter effects.
AB - A recently proposed method to reduce clock jitter effects in continuous-time Delta-Sigma modulators is to generate a return-to-zero feedback with a fixed-width pulse for active feedback. In practice, the pulse width is subject to noise effects causing jitter of the pulse width itself. Therefore, jitter of the pulse width, though not the clock, may still degrade the performance of Delta-Sigma modulators. In this brief, we investigate practical feasibility of the method. It is shown that jitter of the pulse width could be conditionally much smaller than that of the clock, which therefore reduces clock jitter effects.
UR - http://www.scopus.com/inward/record.url?scp=84893201776&partnerID=8YFLogxK
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U2 - 10.1109/MWSCAS.2013.6674631
DO - 10.1109/MWSCAS.2013.6674631
M3 - Conference contribution
AN - SCOPUS:84893201776
SN - 9781479900664
T3 - Midwest Symposium on Circuits and Systems
SP - 245
EP - 248
BT - 2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013
T2 - 2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013
Y2 - 4 August 2013 through 7 August 2013
ER -