TY - JOUR
T1 - Field-effect transistors with layer-by-layer self-assembled nanoparticle thin films as channel and gate dielectric
AU - Cui, Tianhong
AU - Liu, Yi
AU - Zhu, Mo
PY - 2005/10/31
Y1 - 2005/10/31
N2 - This letter reports the fabrication of inorganic field-effect transistors (FET) combing "bottom-up" layer-by-layer (LbL) nanoself-assembly and "top-down" micromanufacturing techniques. The self-assembled multilayer of In2 O3 and Si O2 nanoparticles, patterned by photolithography and lift-off methods, serve as channels and insulating layers, respectively. This FET works at an accumulation mode, with a threshold voltage of -1.25 V, a carrier mobility of 4.24× 10-3 cm2 V s, and an on/off current ratio of 102. Due to the simple, low-cost, and low-temperature features of the LbL nanoself-assembly technique that greatly eliminates expensive and complex facilities, this approach is particularly suitable for the very inexpensive FET fabrication.
AB - This letter reports the fabrication of inorganic field-effect transistors (FET) combing "bottom-up" layer-by-layer (LbL) nanoself-assembly and "top-down" micromanufacturing techniques. The self-assembled multilayer of In2 O3 and Si O2 nanoparticles, patterned by photolithography and lift-off methods, serve as channels and insulating layers, respectively. This FET works at an accumulation mode, with a threshold voltage of -1.25 V, a carrier mobility of 4.24× 10-3 cm2 V s, and an on/off current ratio of 102. Due to the simple, low-cost, and low-temperature features of the LbL nanoself-assembly technique that greatly eliminates expensive and complex facilities, this approach is particularly suitable for the very inexpensive FET fabrication.
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U2 - 10.1063/1.2123390
DO - 10.1063/1.2123390
M3 - Article
AN - SCOPUS:27344442273
SN - 0003-6951
VL - 87
SP - 1
EP - 3
JO - Applied Physics Letters
JF - Applied Physics Letters
IS - 18
M1 - 183105
ER -