TY - GEN
T1 - Graph-based dynamic analysis
T2 - 34th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015
AU - Cherupalli, Hari
AU - Sartori, John M
PY - 2016/1/5
Y1 - 2016/1/5
N2 - In light of increasing energy overheads required to guarantee correctness as variations increase with continued technology scaling, better-than-worst-case (BTWC) design has become a hot topic. Several BTWC design techniques utilize dynamic information like path activity when optimizing a design and rely on path-based analysis to determine the dynamic slack distribution of a workload running on a processor and subsequently optimize a design. In this paper, we show that path-based techniques are not scalable, due to the enormous number of paths in modern designs, and can also result in incorrect results. We propose a graph-based technique for performing dynamic timing and activity analysis of a workload on a processor that addresses the limitations of path-based techniques. Our tool has significantly lower runtime and memory requirements than path-based tools. Consequently, we can perform analysis for larger designs over longer time windows in a shorter amount of time. We also propose two optimizations that improve the performance of our tool.
AB - In light of increasing energy overheads required to guarantee correctness as variations increase with continued technology scaling, better-than-worst-case (BTWC) design has become a hot topic. Several BTWC design techniques utilize dynamic information like path activity when optimizing a design and rely on path-based analysis to determine the dynamic slack distribution of a workload running on a processor and subsequently optimize a design. In this paper, we show that path-based techniques are not scalable, due to the enormous number of paths in modern designs, and can also result in incorrect results. We propose a graph-based technique for performing dynamic timing and activity analysis of a workload on a processor that addresses the limitations of path-based techniques. Our tool has significantly lower runtime and memory requirements than path-based tools. Consequently, we can perform analysis for larger designs over longer time windows in a shorter amount of time. We also propose two optimizations that improve the performance of our tool.
UR - http://www.scopus.com/inward/record.url?scp=84964497576&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84964497576&partnerID=8YFLogxK
U2 - 10.1109/ICCAD.2015.7372642
DO - 10.1109/ICCAD.2015.7372642
M3 - Conference contribution
AN - SCOPUS:84964497576
T3 - 2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015
SP - 729
EP - 735
BT - 2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 2 November 2015 through 6 November 2015
ER -