Hardware Rip-Up Router with Concurrent Wavefront Propagation

W. Choi, G. Sobelman

Research output: Contribution to journalArticlepeer-review

2 Scopus citations

Abstract

The design of a hardware maze router with concurrent source/target wavefront propagation is described. The new design requires fewer clock cycles to find a shortest path than existing designs, and allows for a more efficient implementation of rip-up and reroute. Extensions to multipoint nets and multilayer carriers are included.

Original languageEnglish (US)
Pages (from-to)373-374
Number of pages2
JournalElectronics Letters
Volume25
Issue number6
DOIs
StatePublished - Sep 1 1989

Keywords

  • Integrated circuits
  • Printed circuits

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