Abstract
This paper presents a novel hierarchical approach for pipelining and folding the large CORDIC-based systolic array of a QR decomposition-based recursive least square algorithm (QRD-RLS) adaptive filter to a small fixed size array. With the annihilation-reordering look-ahead transformation in [1], the iteration bound of a QRD-RLS adaptive filter can be reduced linearly with respect to the look-ahead factor. This paper presents, for the first time, how to pipeline and fold such a look-ahead transformed QRD-RLS adaptive filter. Unlike the previously published algorithms, this approach has low complexity and can result in a physical array of any size. In addition, a mathematical model for evaluating these transformations is developed. Using this model, it is shown how a combination of look-ahead, pipelining, and folding transformations can lead to a large increase in throughput and large reduction in area or power consumption. Therefore, the proposed approach is of great significance for application-specific IC chip design, high-level hardware synthesis, and special-purpose processor design. The optimally designed QRD-RLS adaptive filters can be used for adaptive digital beamforming applications, which play an important role in radar, sonar, and mobile/wireless communication systems.
Original language | English (US) |
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Pages (from-to) | 1503-1519 |
Number of pages | 17 |
Journal | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing |
Volume | 47 |
Issue number | 12 |
DOIs | |
State | Published - Dec 2000 |
Bibliographical note
Funding Information:Manuscript received March 2000; revised September 2000. This work was supported by Defense Advanced Research Project Agency under Contract DA/DABT63-96-C-0050. This paper was recommended by Associate Editor E. Friedman.