HW/SW codesign incorporating edge delays using dynamic programming

K. Bhasyam; K. Bazargan

doi:10.1109/DSD.2003.1231945

HW/SW codesign incorporating edge delays using dynamic programming

K. Bhasyam, K. Bazargan

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Scopus citations

Abstract

We present an algorithm based on dynamic programming to perform the HW/SW partitioning and scheduling of a given task graph for minimum latency subject to resource constraint. The major contribution of this paper is to consider the edge communication delays in the dynamic programming solution of the problem. The algorithm has a polynomial run time complexity on trees. We also introduce a pruning technique to reduce the runtime of the worst-case scenario of directed acyclic graphs (DAGs). The algorithm has been implemented and the results are reported. A very fast quality heuristic is also proposed and implemented to provide good solutions in negligible run time.

Original language	English (US)
Title of host publication	Proceedings - Euromicro Symposium on Digital System Design, DSD 2003
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	264-271
Number of pages	8
ISBN (Electronic)	0769520030, 9780769520032
DOIs	https://doi.org/10.1109/DSD.2003.1231945
State	Published - 2003
Event	Euromicro Symposium on Digital System Design, DSD 2003 - Belek-Antalya, Turkey Duration: Sep 1 2003 → Sep 6 2003

Publication series

Name	Proceedings - Euromicro Symposium on Digital System Design, DSD 2003

Other

Other	Euromicro Symposium on Digital System Design, DSD 2003
Country/Territory	Turkey
City	Belek-Antalya
Period	9/1/03 → 9/6/03

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Publisher Copyright:
© 2003 IEEE.

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10.1109/DSD.2003.1231945

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HW/SW codesign incorporating edge delays using dynamic programming. / Bhasyam, K.; Bazargan, K.
Proceedings - Euromicro Symposium on Digital System Design, DSD 2003. Institute of Electrical and Electronics Engineers Inc., 2003. p. 264-271 (Proceedings - Euromicro Symposium on Digital System Design, DSD 2003).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Bhasyam, K & Bazargan, K 2003, HW/SW codesign incorporating edge delays using dynamic programming. in Proceedings - Euromicro Symposium on Digital System Design, DSD 2003. Proceedings - Euromicro Symposium on Digital System Design, DSD 2003, Institute of Electrical and Electronics Engineers Inc., pp. 264-271, Euromicro Symposium on Digital System Design, DSD 2003, Belek-Antalya, Turkey, 9/1/03. https://doi.org/10.1109/DSD.2003.1231945

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HW/SW codesign incorporating edge delays using dynamic programming

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