Abstract
A novel transformation referred to as hybrid annihilation transformation (HAT) for pipelining the QR decomposition (QRD) based least square adaptive filters has been developed. HAT provides a unified framework for the derivation of highthroughput/low-power VLSI architectures of three kinds of QRD adaptive filters namely QRD recursive least-square (LS) adaptive filters QRD LS lattice adaptive filters and QRD multichannel LS lattice adaptive filters. In this paper HAT is presented as a solution to break the bottleneck of a high-throughput implementation introduced by the inherent recursive computation in the QRD based adaptive filters. The most important feature of the proposed solution is that it does not introduce any approximation in the entire filtering process. Therefore it causes no performance degradation no matter how deep the filter is pipelined. It allows a linear speedup in the throughput rate by a linear increase in hardware complexity. The sampling rate can be tradedoff for power reduction with lower supply voltage for applications where high-speed is not required. The proposed transformation is addressed both analytically with mathematical proofs and experimentally with computer simulation results on its applications in wireless code division multiple access (CDMA) communications conventional digital communications and multichannel linear predictions.
Original language | English (US) |
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Pages (from-to) | 661-674 |
Number of pages | 14 |
Journal | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing |
Volume | 48 |
Issue number | 7 |
DOIs | |
State | Published - Jul 2001 |
Bibliographical note
Funding Information:Manuscript received July 27, 1999; revised June 19, 2001. This work was supported by the U.S. Department of Defense Advanced Research Projects Agency under Contract DA/DABT 63-96-C-0050. This paper was recommended by Associate Editor K. Jenkins.
Keywords
- Adaptive filtering
- Algorithm transformations
- High speed (high throughput)
- LSL
- Multichannel lsl
- Parallel processing
- Pipelining
- RLS