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Hybrid Binary-Unary Hardware Accelerator
S. Rasoul Faraji,
Kia Bazargan
Electrical and Computer Engineering
Research output
:
Contribution to journal
›
Article
›
peer-review
12
Scopus citations
Overview
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Mathematics
Hardware Accelerator
100%
Unary
54%
Binary
37%
Costs
19%
FPGA Implementation
16%
Percent
16%
Field Programmable Gate Array
14%
Edge Detection
12%
Beat
11%
Latency
11%
Energy Efficiency
7%
Energy Consumption
6%
sin(-x)
6%
Data Streams
6%
Energy
6%
Throughput
5%
Computing
5%
Design
5%
High Resolution
5%
Stochastic Methods
5%
Complex Functions
4%
Encoding
4%
Divides
4%
Predict
4%
Synthesis
4%
Regression Model
3%
Knowledge
3%
Output
3%
Methodology
3%
Range of data
2%
Engineering & Materials Science
Particle accelerators
49%
Computer hardware
28%
Field programmable gate arrays (FPGA)
22%
Costs
18%
Edge detection
14%
Pipelines
10%
Energy efficiency
5%
Energy utilization
4%
Throughput
4%