Selection of proper architecture and implementation styles can strongly influence the performance of dedicated VLSI DSP circuits. The impact of architecture choices is illustrated by considering a number of representative signal processing examples and a few general architecture transformation techniques. It is shown that algorithm transformation techniques such as look-ahead computation can create concurrency in nonconcurrent recursive signal processing algorithms, and that inherently new signal processing algorithms are processed with concurrency. This leads to pipelined algorithm topologies without any hardware overhead. To illustrate the impact of the implementation styles, it is shown that the internal redundant number system can lead to more efficient realization of multipliers and adders. Using systematic folding and unfolding techniques, digit-serial architectures with no restrictions on the digit size can be described. All of these architectural techniques can increase the performance of DSP circuits.
|Original language||English (US)|
|Title of host publication||TENCON 1992 - Technology Enabling Tomorrow|
|Subtitle of host publication||Computers, Communications and Automation towards the 21st Century - 1992 IEEE Region 10 International Conference|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||5|
|State||Published - 1992|
|Event||1992 IEEE Region 10 International Conference on Technology Enabling Tomorrow: Computers, Communications and Automation towards the 21st Century, TENCON 1992 - Melbourne, Australia|
Duration: Nov 11 1992 → Nov 13 1992
|Name||IEEE Region 10 Annual International Conference, Proceedings/TENCON|
|Conference||1992 IEEE Region 10 International Conference on Technology Enabling Tomorrow: Computers, Communications and Automation towards the 21st Century, TENCON 1992|
|Period||11/11/92 → 11/13/92|
Bibliographical notePublisher Copyright:
© 1992 IEEE.