Impact of metal gate work function on nano CMOS device performance

Y. T. Hou, Tony Low, Bin Xu, Ming Fu Li, G. Samudra, D. L. Kwong

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

We studied two effects in the metal gate work function engineering in nano CMOSFETs: (1) Gate work function shifts induced by carrier quantization in Si and Ge ultra-thin body FETs with sub-10 nm body thickness and different surface orientations. Guidelines for metal gate work function engineering are provided and technical challenges identified; (2) We presented a systematic study on gate tunneling characteristics of metal gate CMOSFETs. A reduction of gate to source/drain extension tunneling is found when using near mid-gap metal gate in SOI CMOS, especially when using high-K dielectric. Benefits of this reduction to transistor off-state leakage and to future CMOS scaling were analyzed.

Original languageEnglish (US)
Title of host publication2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004
EditorsR. Huang, M. Yu, J.J. Liou, T. Hiramito, C. Claeys
Pages57-60
Number of pages4
Volume1
StatePublished - Dec 1 2004
Event2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004 - Beijing, China
Duration: Oct 18 2004Oct 21 2004

Other

Other2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004
CountryChina
CityBeijing
Period10/18/0410/21/04

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