Inverter Based OTA Design

Rakesh Kumar Palani, Ramesh Harjani

Research output: Chapter in Book/Report/Conference proceedingChapter

Abstract

The increased demand for battery operated devices has placed added pressure on lowered supply voltages. Technology scaling proportionally scales supply voltages to maintain device reliability but threshold voltages have not scaled as rapidly to limit the off current leakage in transistors. Delta sigma ADCs, particularly, continuous time delta sigma modulator are attractive due to implicit anti-aliasing, relaxed speed requirements on the active elements and the use of resistive input impedances. Although the use of multibit quantizers relaxes the design of the loop filter and are less sensitive to clock jitter, single-bit designs are simpler and do not require any dynamic element matching. The design of first integrator in a single bit modulator with adequate linearity and low power is always a challenge particularly in lower technologies [21].

Original languageEnglish (US)
Title of host publicationAnalog Circuits and Signal Processing
PublisherSpringer
Pages29-39
Number of pages11
DOIs
StatePublished - 2017

Publication series

NameAnalog Circuits and Signal Processing
ISSN (Print)1872-082X
ISSN (Electronic)2197-1854

Bibliographical note

Publisher Copyright:
© 2017, Springer International Publishing AG.

Keywords

  • Common Mode Rejection Ratio
  • Common Mode Voltage
  • Delta Sigma Modulator
  • Gain Stage
  • Harmonic Distortion

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