Modeling failure reduction for combinational logic using gate level NMR

Drew C. Ness, Christian J. Hescott, David J Lilja

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We present a mathematical model for describing the relationship between overhead and error reduction under single-error conditions in combinational logic using Nmodular redundancy (NMR) as an upper bound. We then provide an analysis for the model under more realistic circuit and overhead assumptions. We compare system, sub-circuit, and gate level NMR. Based on our results, implementing NMR at the gate level offers the benefits of NMR with customizable overheads but with reduced effectiveness when compared to system level implementations.

Original languageEnglish (US)
Title of host publication2007 Proceedings - Annual Reliability and Maintainability Symposium, RAMS
Pages208-213
Number of pages6
DOIs
StatePublished - 2007
Event2007 53rd Annual Reliability and Maintainability Sympsoium, RAMS - Orlando, FL, United States
Duration: Jan 22 2006Jan 25 2006

Publication series

Name2007 Proceedings - Annual Reliability and Maintainability Symposium, RAMS
ISSN (Print)0149-144X

Other

Other2007 53rd Annual Reliability and Maintainability Sympsoium, RAMS
Country/TerritoryUnited States
CityOrlando, FL
Period1/22/061/25/06

Keywords

  • Fault-tolerance
  • N modular redundancy
  • Soft errors

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