This paper presents the design and test results of a prototype monolithic pixel sensor manufactured in deep-submicron fully depleted Silicon-On-Insulator (SOI) CMOS technology. In the SOI technology, a thin layer of integrated electronics is insulated from a (high-resistivity) silicon substrate by a buried oxide. Vias etched through the oxide allow to contact the substrate from the electronics layer, so that pixel implants can be created and a reverse bias can be applied. The prototype chip, manufactured in OKI 0.15 μ m SOI process, features both analog and digital pixels on a 10 μ m pitch. Results of tests performed with an infrared laser and 1.35 GeV electrons and a first assessment of the effect of ionising and non-ionising doses are discussed.
|Original language||English (US)|
|Number of pages||5|
|Journal||Nuclear Instruments and Methods in Physics Research, Section A: Accelerators, Spectrometers, Detectors and Associated Equipment|
|State||Published - Jun 1 2009|
Bibliographical noteFunding Information:
This work was supported by the Director, Office of Science, of the US Department of Energy under Contract no. DE-AC02-05CH11231. We thank the staff of the LBNL Advanced Light Source and 88-in. Cyclotron for their assistance and for the excellent performance of the machines.
- CMOS technology
- Monolithic pixel sensor
- Particle detection