Floorplanning is an early phase in chip planning. It provides information on approximate area, delay, power, and other performance measures. Careful floorplanning is, thus, of extreme importance. In many applications, while a good floorplan is needed, the information about all modules is not available, or even worse, part of the provided information is inaccurate. Examples of such applications are designing a huge system where the floorplan is needed early in the design process, but not all the modules have been designed. Another example is the field of reconfigurable computing where it is not known what modules will be needed on the reconfigurable chip as the program is being executed. Floorplanning with uncertainty is the problem of obtaining a good floorplan when the information about module dimensions is not complete. In this paper, the floorplanning problem with uncertainty is formulated. Correlation between input characteristics and output characteristics is studied. Also, it is established that traditional floorplanners are incapable of efficiently handling uncertainty. An effective method for dealing with uncertain data is proposed. Experiments show that, for example, with up to 30% input uncertainty an area estimate with less than 7% error can be obtained.
|Original language||English (US)|
|Number of pages||9|
|Journal||IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems|
|State||Published - 1999|
|Event||Proceedings of the 1998 International Symposium on Physical Design, ISPD-98 - Monterey, CA, United States|
Duration: Apr 6 1998 → Apr 8 1998
Bibliographical noteFunding Information:
Manuscript received October 2, 1998. This work was supported in part by the Defense Advanced Research Projects Agency under Contract Number DABT63-97-C-0035 and in part by the National Science Foundation (NSF) under Grant 9527389. This paper was recommended by Associate Editor M. Wong.
- Area estimation
- Design planning
- Reconfigurable computing