TY - GEN
T1 - Novel embedded low impedance design method approach for MMIC applications
AU - Davies-Venn, E.
AU - Franklin, Rhonda R
PY - 2006/12/1
Y1 - 2006/12/1
N2 - A simple method for creating low impedance lines using embedded structures is presented. Measured results in a edge embedded CPW architecture show a 50% reduction in length compared to a surface structure. The reduction is due to an increase in capacitance of the embedded design resulting from a larger capacitive area and effective dielectric constant. Index Terms -Silicon Embedded, Coplanar Waveguide and Low Impedance Lines.
AB - A simple method for creating low impedance lines using embedded structures is presented. Measured results in a edge embedded CPW architecture show a 50% reduction in length compared to a surface structure. The reduction is due to an increase in capacitance of the embedded design resulting from a larger capacitive area and effective dielectric constant. Index Terms -Silicon Embedded, Coplanar Waveguide and Low Impedance Lines.
UR - http://www.scopus.com/inward/record.url?scp=33847056685&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=33847056685&partnerID=8YFLogxK
U2 - 10.1109/SMIC.2005.1587960
DO - 10.1109/SMIC.2005.1587960
M3 - Conference contribution
AN - SCOPUS:33847056685
SN - 0780394720
SN - 9780780394728
T3 - 2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems - Digest of Papers
SP - 252
EP - 255
BT - 2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems - Digest of Papers
T2 - 2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
Y2 - 18 January 2006 through 20 January 2006
ER -