Program/erase speed, endurance, retention, and disturbance characteristics of single-poly embedded flash cells

Seung Hwan Song, Jongyeon Kim, Chris H. Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

N-channel and P-channel single-poly embedded flash (eflash) memory cells were implemented in a standard CMOS logic process. Among the different configurations based on standard I/O devices, the N-channel cell with a PMOS-PMOS-NMOS combo and the P-channel cell with an NMOS-NMOS-PMOS combo were found to be most attractive in terms of program/erase performance, while the cell with a coupling device having P+ poly showed longer retention characteristic than the cells with a coupling device having N+ poly. Negligible program disturbance and floating gate coupling were observed in all cell types.

Original languageEnglish (US)
Title of host publication2013 IEEE International Reliability Physics Symposium, IRPS 2013
DOIs
StatePublished - Aug 7 2013
Event2013 IEEE International Reliability Physics Symposium, IRPS 2013 - Monterey, CA, United States
Duration: Apr 14 2013Apr 18 2013

Publication series

NameIEEE International Reliability Physics Symposium Proceedings
ISSN (Print)1541-7026

Other

Other2013 IEEE International Reliability Physics Symposium, IRPS 2013
CountryUnited States
CityMonterey, CA
Period4/14/134/18/13

Keywords

  • Embedded Flash
  • Flash Program/Erase
  • Flash Reliability
  • Single-Poly Embedded Flash Cell

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