With increased interests of neural networks, hardware implementations of neural networks have been investigated. Researchers pursue low hardware cost by using different technologies such as stochastic computing and quantization. For example, the quantization is able to reduce total number of trained weights and results in low hardware cost. Stochastic computing aims to lower hardware costs substantially by using simple gates instead of complex arithmetic operations. In this paper, we propose a new stochastic multiplier with shifted unary code adders (SUC-Adder) for quantized neural networks. The new design uses the characteristic of quantized weights and tremendously reduces the hardware cost of neural networks. Experimental results indicate that our stochastic design achieves about 10x energy reduction compared to its counterpart binary implementation while maintaining slightly higher recognition error rates than the binary implementation.
|Original language||English (US)|
|Title of host publication||2018 19th International Symposium on Quality Electronic Design, ISQED 2018|
|Publisher||IEEE Computer Society|
|Number of pages||7|
|State||Published - May 9 2018|
|Event||19th International Symposium on Quality Electronic Design, ISQED 2018 - Santa Clara, United States|
Duration: Mar 13 2018 → Mar 14 2018
|Name||Proceedings - International Symposium on Quality Electronic Design, ISQED|
|Other||19th International Symposium on Quality Electronic Design, ISQED 2018|
|Period||3/13/18 → 3/14/18|
Bibliographical noteFunding Information:
This work was supported in part by National Science Foundation grant no. CCF-1408123. Any opinions, findings and conclusions or recommendations expressed in this material are those of the authors and do not necessarily reflect the views of the NSF.
- Neural networks
- Stochastic computing