This paper presents a hybrid analog/digital computing circuit that solves a form of the selective harmonic minimization problem in a fast and scalable manner. Voltages in the circuit represent variables in the optimization problem, and, in steady state, converge to the optimal solution of the problem. A digital microcontroller sets voltages at particular nodes in the circuit as to program the cost function and other inputs to the optimization. We present a specific realization of the computing circuit that solves for eight independent switching angles for a quarter-wave symmetric PWM driven two-level single-phase inverter. This realization minimizes seven undesired harmonics while also maintaining control of the modulation index. The simulation results demonstrate that the proposed circuit can converge to the optimal solution in less than 5.0 ms. Our survey of prior methods indicates that this is substantially faster than existing published methods in the literature.
|Original language||English (US)|
|Title of host publication||2021 IEEE Applied Power Electronics Conference and Exposition, APEC 2021|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||6|
|State||Published - Jun 14 2021|
|Event||36th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2021 - Virtual, Online, United States|
Duration: Jun 14 2021 → Jun 17 2021
|Name||Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC|
|Conference||36th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2021|
|Period||6/14/21 → 6/17/21|
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