Statistical design of integrated circuits

Research output: Chapter in Book/Report/Conference proceedingChapter

Abstract

The presence of process variations makes it imperative to depart from the traditional corner-based methodology and migrate to statistical design techniques. In this chapter, based on a set of variational models that capture correlated as well as uncorrelated variations, we present techniques for presilicon statistical timing and power analysis to determine the performance spread over a population of manufactured parts. In order to improve this spread, we discuss presilicon statistical optimization techniques that incorporate appropriate margins to enable improved manufacturing yield. At the post-silicon stage, we then present how a set of compact sensors may be used to predict the delay of a manufactured part, with known confidence, through a small set of measurements on the sensors: such data can then be used to drive adaptive post-silicon tuning approaches that are individualized to each manufactured part.

Original languageEnglish (US)
Title of host publicationLow-Power Variation-Tolerant Design in Nanometer Silicon
PublisherSpringer US
Pages109-149
Number of pages41
ISBN (Print)9781441974174
DOIs
StatePublished - Dec 1 2011

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