Statistical timing driven partitioning for VLSI circuits

Cristinel Ababei, Kia Bazargan

Research output: Contribution to journalConference articlepeer-review

5 Scopus citations

Abstract

Presents statistical-timing driven partitioning for performance optimization. We show that by using the concept of node criticality we can enhance the Fiduccia-Mattheyses (FM) partitioning algorithm to achieve, on average, around 20% improvements in terms of timing, among partitions with the same cut size. By incorporating mechanisms for timing optimization at the partitioning level, we facilitate wire-planning at high levels of the design process.

Original languageEnglish (US)
Article number998465
Number of pages1
JournalProceedings -Design, Automation and Test in Europe, DATE
DOIs
StatePublished - Dec 1 2002
Event2002 Design, Automation and Test in Europe Conference and Exhibition, DATE 2002 - Paris, France
Duration: Mar 4 2002Mar 8 2002

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