Strained Si NMOSFETs for high performance CMOS technology

K. Rim, S. Koester, M. Hargrove, J. Chu, P. M. Mooney, J. Ott, T. Kanarsky, P. Ronsheim, M. Ieong, A. Grill, H. S.P. Wong

Research output: Contribution to conferencePaperpeer-review

189 Scopus citations


Performance enhancements in strained Si NMOSFETs were demonstrated at Leff <70 nm. A 70% increase in electron mobility was observed at vertical fields as high as 1.5 MV/cm for the first time, suggesting a new mobility enhancement mechanism in addition to reduced phonon scattering. Current drive increase by ≥-35% was observed at Leff <70 nm. These results indicate that strain can be used to improve CMOS device performance at sub-100 nm technology nodes.

Original languageEnglish (US)
Number of pages2
StatePublished - Jan 1 2001
Externally publishedYes
Event2001 VLSI Technology Symposium - Kyoto, Japan
Duration: Jun 12 2001Jun 14 2001


Other2001 VLSI Technology Symposium

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